Wall Street has spent years pricing AI chip stocks on one core assumption: raw computing power wins.

More transistors, more speed, more performance.

That was the race, and investors bid up names including Nvidia (NVDA), Taiwan Semiconductor Manufacturing Company (TSM), and Broadcom (AVGO) accordingly.

Kevin Zhang, senior vice president of business development at TSMC, just challenged that assumption directly.

Speaking to reporters at a conference in Amsterdam on May 28, Zhang said the thing TSMC’s customers are demanding above all else right now is not more horsepower. It is energy efficiency.

“The area customers most want improvement in is energy efficiency,” Zhang told reporters, according to Reuters. “This is true across the board, whether you are the edge guy, smartphone, mobile, IoT application, or high-performance AI data center.”

That one statement, from the Business Development chief of the company that manufactures chips for Nvidia, AMD, Apple, Google, Amazon, Meta, and Microsoft, carries real weight.

It signals a shift in what the entire semiconductor industry is optimizing for, and it changes the calculus for investors trying to figure out which AI bets still make sense.

TSMC’s customers are hitting a wall that speed can’t solve

The AI boom created an electricity crisis hiding in plain sight.

Running advanced AI models requires enormous amounts of power, and data center operators are now facing the real-world costs of that demand in electricity bills, grid constraints, and the physical limits of how much heat a facility can handle before performance degrades.

TSMC, which controls approximately 72% of the global chip foundry market, according to The Motley Fool, is hearing this from every segment of its customer base.

Zhang’s comments confirm what energy analysts and data center operators have been flagging privately. Electricity availability, not silicon capability, is becoming the binding constraint on how fast AI can actually scale.

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The semiconductor industry has historically solved performance problems by shrinking transistors, thereby packing more computing power into the same physical space.

But simply making chips smaller no longer delivers the efficiency gains it once did, particularly for the kinds of AI workloads that hyperscalers such as Microsoft, Google, and Amazon are running.

Zhang confirmed TSMC expects its chips to cut power consumption by up to 30% between its current N2 node and its A14 generation, while also delivering more than 20% higher computing performance.

That combination of more output with less electricity is now the product specification that defines competitive advantage in chip design.

TSMC’s shift toward energy efficiency over raw computing power is reshaping AI chip design priorities across the semiconductor industry.

BING-JHEN HONG / Getty Images

What TSMC is actually doing about it and what it means for the stock

TSMC is not waiting for a single breakthrough.

Zhang outlined a multi-track approach to meeting the efficiency demands of its customers.

  • Advanced packaging and chip stacking: Rather than relying solely on shrinking transistors, TSM is integrating components more closely together, including through 3D stacking, which can boost performance without proportional increases in power draw.
  • Photonics: Using light rather than electrical signals to move data within and between chips reduces energy lost to heat and can dramatically reduce the data movement bottleneck that limits many AI workloads.
  • CoWoS packaging: TSMC’s proprietary Chip-on-Wafer-on-Substrate technology is already a critical constraint in Nvidia’s AI chip supply chain, with reports that CoWoS capacity is expected to grow at an 80% compound annual growth rate through 2027.

Investors watching TSMC should note what this roadmap actually implies.

The company’s most profitable and highest-demand technology layers are the exact ones being prioritized to solve the energy efficiency problem, and that is not a distraction from the AI trade. It is the next phase.

TSMC is up approximately 40% in 2026 alone, according to Yahoo Finance data, and the consensus analyst target sits at approximately $460, suggesting roughly 9% upside from current levels, Simply Wall St notes.

The wider ripple: which sectors this shift benefits most

Zhang’s comments don’t just matter for chip investors. The pivot to energy efficiency in semiconductor design has real downstream implications for other parts of the market.

1. Power and utilities

Every percentage point of efficiency gained per chip delays, but does not eliminate, the need for more electricity generation.

The International Energy Agency has flagged that global data center electricity consumption could double by 2026 from its 2022 levels.

Utilities and power generation companies with data center exposure, including those building nuclear and natural gas capacity near major chip fab clusters, remain structurally positioned, regardless of which chip architecture wins.

2. Chipmakers beyond TSMC

The efficiency-first shift rewards companies that have already bet on packaging and photonics over raw transistor density.

Broadcom (AVGO), whose AI semiconductor revenue more than doubled year over year to $8.4 billion in its most recent quarter, supplies the networking silicon that connects processors inside AI data centers.

That data-movement layer becomes more, not less, important as photonics and advanced packaging define the next performance leap.

Related: TSMC predicts semiconductor market will reach $1.5 trillion by 2030

It is also worth noting TSMC’s response to a rival.

Chinese chipmaker Huawei unveiled its “Tau Scaling Law” plan the same week, as reported on the Huawei website, aiming to improve performance by speeding up internal chip data movement.

This is an approach that Zhang said is “largely dependent on integrating components more closely, such as through 3D stacking.”

The implication is that the efficiency playbook being forced on Chinese firms by U.S. export controls on advanced lithography equipment is, effectively, the same playbook that TSMC is choosing to pursue voluntarily.

What still needs to happen before this reshapes the AI trade

Zhang’s message is directionally clear, but the timeline matters for investors.

Here is what has to hold for the efficiency pivot to translate into stock price gains for TSMC and its ecosystem partners.

1. A14 node execution

TSMC’s target of delivering 30% power reduction by 2028 depends on the A14 process generation arriving on schedule.

Any delays in advanced node ramp would push the efficiency gains investors are pricing in further out.

2. CoWoS supply must expand

Advanced packaging capacity remains a bottleneck.

Bernstein estimates TSMC’s CoWoS capacity will reach 125,000 wafers per month by end of 2026, but hyperscaler demand continues to outpace that ramp.

3. Hyperscaler capex must hold

The efficiency narrative only matters if AI infrastructure spending continues.

With Microsoft, Amazon, Google, and Meta collectively targeting hundreds of billions in AI infrastructure over the next few years, that spend looks durable.

But any meaningful pullback would quickly reprice the semiconductor supply chain.

4. Geopolitical stability in Taiwan

This is the persistent risk no roadmap can resolve.

TSMC’s Arizona fabs offer some diversification, but the overwhelming majority of leading-edge production remains in Taiwan.

TSMC’s first-quarter 2026 revenue grew 40.6% year over year to $35.9 billion, with gross margin at 66.2%. The company expects its 2026 full-year revenue growth to approach the mid-30% range.

The bottom line for investors

Zhang’s Amsterdam statement is more than a product update. It reframes the AI chip investment thesis around a constraint, electricity cost and availability, that raw performance specs cannot resolve on their own.

For investors, the practical takeaway is that although the AI trade is not over, the next leg rewards a different set of attributes than the last.

Companies that manufacture the packaging, photonics, and advanced integration layers, which are the pieces that move data efficiently between chips rather than just cramming more transistors onto a single die, are increasingly where the margin and the moat now sit.

TSMC is positioned at the center of that transition, with Nvidia, Broadcom, and the major hyperscalers all dependent on its advanced packaging capacity.

The stock’s 40% year-to-dategain already reflects strong conviction in that role.

Whether it has another leg from here depends on execution at the nodes Zhang just described, and on how quickly the market reprices “performance per watt” as the new benchmark for AI chip leadership.

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